4.16 Semiconductor Manufacturing

4.16.1 Emissions

Introduction

These categories include organic and greenhouse gas (GHG) emissions from semiconductor manufacturing plants and other related integrated circuits manufacturing. Semiconductor manufacturing processes include blank wafer production, semiconductor fabrication, and assembly and packaging. (The following description of the semiconductor manufacturing processes was taken from the BAAQMD’s Permit Handbook, Section 7, Chapter 4.)

Blank Wafer Production

Silicon Crystal Growth: Molten silicon is introduced into a mold with a seed crystal of silicon. As the molten silicon cools, it crystallizes around the seed to “grow” a single crystalline ingot. Crystal growth is not in itself a source of air emissions and is not subject to permit requirements. Miscellaneous cleaning operations may result in organic or inorganic emissions. Organic cleaning operations may be exempt in accordance with Rule 2-1-118. Abatement of organic or inorganic emissions may be required if emissions exceed the current best available control technology (BACT) trigger level.

Wafer Manufacturing: The cooled silicon ingot is shaped and sliced into round wafers, which are mechanically polished (“lapped”). These steps are subject to the particulate emission limits of Regulation 6 if particulate emissions are produced and vented outside of the facility. Mechanical shaping, slicing and polishing may be exempt from permit requirements in accordance with Rule 2-1-121.1 or 2-1-125.1.2.

After polishing, wafers are etched in a chemical bath to remove surface imperfections. Depending on the type and concentration of etchants used, mists and aerosols may be produced. Finally, each wafer is polished to a smooth finish. The etching operations may be exempt from permitting requirements by Rule 2-1-127.4, if the toxic risk provisions of Rule 2-1-316 are satisfied.

If adhesives are used to fix wafers in position during polishing, the use of adhesives may be subject to VOC limits and other requirements in Rule 8-51. The application of adhesives may be exempt from permit requirements in accordance with Rule 2-1-119.2, if the toxic risk provisions of Rule 2-1-316 are satisfied. Miscellaneous cleaning operations may result in organic or inorganic emissions. Organic cleaning operations may be exempt in accordance with Rule 2-1-118. Abatement of organic or inorganic emissions may be required if emissions exceed the current best available control technology (BACT) trigger level.

Semiconductor Manufacturing

The processes used to form ICs on the wafer include:

  • Oxidation, where an inert layer of silicon dioxide is formed on the wafer by exposing the wafer to a heated oxygen environment.

  • Photoresist application, exposure and development, where solvent-based, light-sensitive resin solutions are uniformly applied to the wafer and then processed to leave a pattern of cured photoresist on the wafer which corresponds to the circuit image, while removing the non-image coating. Photoresist applicators may also apply non-light sensitive coatings (spin-on-glass, anti-reflective coatings) and solvents (edge bead remover, hexamethyldisilazane (HMDS)).

  • Etching, where reactive gases or liquids are used to remove the silicon dioxide layer from the wafer surface where it is not protected by cured photoresist, thereby exposing the underlying silicon for further processing; liquid etching is classified as a wet chemical station, as described below.

  • Photoresist stripping, where cured photoresist is removed from the wafer after it has allowed selective wafer surface processing; stripping solutions may be organic or inorganic depending on the composition of the underlying wafer surface, and therefore may be classified as either solvent stations or a wet chemical stations, as described below.

  • Doping (diffusion, ion implant), where the wafer is exposed to impurities that penetrate into the exposed silicon patterns to selectively modify the electrical conductivity of the silicon, thereby producing electronic components and circuits.

  • Layering (epitaxial growth, metallization films, chemical vapor deposition), where a doped wafer is covered with a uniform layer of silicon (to form a base for additional circuit layers) or metal (to form a conductive connection between the circuit layers and the external IC package).

Other processes include:

  • Chemical mechanical polishing (CMP), where wafer surfaces are polished to maintain wafer flatness during processing.
  • Solvent stations, where wafers or tools are cleaned by immersion in a solvent liquid or vapor or by being sprayed with a solvent liquid.
  • Wet chemical stations, where wafers or tools are cleaned or etched by immersion in an inorganic solution or by being sprayed with such a solution.
  • Wipe cleaning, where tools and work surfaces are cleaned in place or at a dedicated station.
Assembly and Packaging

This is where wafers are cut into individual integrated circuits, which then are mounted into a package for assembly on a printed circuit board.

Methodology

Category #43. This category contains point sources only where information on equipment, operating data, and throughput of each source are reported by individual semiconductor manufacturing plants and are stored in the District’s Data Bank. Organic emissions and GHG’s are calculated by using the throughput data of specific materials reported and emission factors that are based on various test data and publication. These information are updated upon permit renewal.

Category #1891. This category estimates emissions from high global warming potential (GWP) materials (perfluorocarbons, nitrogen trifluoride, and sulfur hexafluoride) in the semiconductor industry. These emissions are considered as area sources. These high GWP GHG emissions were estimated using data from the latest California Air Resources Boards (CARB) “Documentation of California’s Greenhouse Gas Inventory”, California Greenhouse Gas Inventory by IPCC Category, Sixth Edition, 2000 - 2011 (Sector: Industrial: Manufacturing: Electric & Electronic Equipment: Semiconductors & Related Products). From the State level, the Bay Area emissions were calculated using the employee data tables found in the California Department of Finance’s (CDF) 2011 updated Statistical Abstract report. The 2011 Statewide and Bay Area number of employees within the “Computer and Electronic Products” sector were found in Table C- 4 and C-7 of the Statistical Abstract, respectively. The data from these two tables determined the BAAQMD fraction to the State total.

Perfluorocarbon emissions are considered total organic gas (TOG) emissions, with no reactive organic gas (ROG) component. They are also considered GHG’s with a range of global warming potential (GWP) values. The 2011 composite GWP value used for calculation purposes was 1,308.

Monthly Variation

Emissions for both categories were assumed to be uniform for each month of the year.

County Distribution

Category #43. The county location of each company as reported in the Data Bank was used to distribute emissions into each county.

Category #1891. The number of employees in each applicable Bay Area county’s, “Computer and Electronic Products” sector was used to determine the county fraction. This data was found in Table C-7 of the 2011 CDF Statistical Abstract report.

Table 4.32: County fractions.
category ALA CC MAR NAP SF SM SNC SOL SON
#43 Semiconductor Mfg. 20.9% 0.5% – – – – 76.8% – 1.7%
#1891 Semiconductor Mfg. (TOG & High GWP) 12.0% 1.0% 1.0% – 2.0% 3.0% 79.0% – 2.0%